Название: In-Memory Computing: Synthesis and Optimization Автор: Saeideh Shirinzadeh, Rolf Drechsler
Издательство: Springer
Год: 2019 (2020 Edition)
Страниц: 121
Язык: английский
Формат: pdf (true), djvu
Размер: 10.1 MB
Presents a comprehensive synthesis flow for the emerging field of logic-in-memory computing.
This book describes a comprehensive approach for synthesis and optimization of logic-in-memory computing hardware and architectures using memristive devices, which creates a firm foundation for practical applications. Readers will get familiar with a new generation of computer architectures that potentially can perform faster, as the necessity for communication between the processor and memory is surpassed. The discussion includes various synthesis methodologies and optimization algorithms targeting implementation cost metrics including latency and area overhead as well as the reliability issue caused by short memory lifetime.
Among the different storage components provided by the memory hierarchy used in today’s computer architectures, we refer to commonly used hard disk as the secondary storage and the Random-Access Memory (RAM) as the primary storage, the so-called memory. The amount of disk in any typical computer is considerably larger than RAM due to its high price. This makes it costly to allocate large amounts of RAM enough to be used as the only storage space, and using the disk only for archiving permanently. Accordingly, use of hard disk can not be avoided when processing data larger than the storage volume provided by RAM. However, the access time for information stored on the hard disk is at least 20 times the amount of time needed by RAM. This latency caused by the communication between memory and processor limits the overall performance of the CPU as it can not work at a higher speed than the required waiting time for the data to be retrieved which is
referred to as memory bottleneck.
The memory bottleneck is nowadays the main obstacle in the advancement of computer systems. The emergence of applications such as Internet of Things (IoT) and Big Data has drawn attentions to alleviate the memory issue due to the need to process and retrieve huge amount of data in real time.
• Presents a comprehensive synthesis flow for the emerging field of logic-in-memory computing;
• Describes automated compilation of programmable logic-in-memory computer architectures;
• Includes several effective optimization algorithm also applicable to classical logic synthesis;
• Investigates unbalanced write traffic in logic-in-memory architectures and describes wear leveling approaches to alleviate it.
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