Название: Parallel Programming And Optimization With Intel Xeon Phi Coprocessors
Автор: Vladimirov A., Asai R,, Karpusenko V.
Издательство: Sunnyvale (CA): Colfax International
Год: 2019
Формат: pdf
Страниц: 507
Размер: 12 mb
Язык: английский
You are holding in your hands or browsing on your computer screen a comprehensive set of training materials for this training program. This document will guide you to the mastery of parallel programming with Intel Xeon family products: Intel Xeon processors and Intel Xeon Phi coprocessors. The curriculum includes a detailed presentation of the programming paradigm for Intel Xeon product family, optimization guidelines, and hands-on exercises on systems equipped with Intel Xeon Phi coprocessors, as well as instructions on using Intel software development tools and libraries included in Intel Parallel Studio XE. These training materials are targeted toward developers familiar with C/C++ programming in Linux.
A lot has happened in Intel’s “parallel universe” since the publication of the first edition of this book in March 2013. The family of Intel Xeon Phi coprocessors has grown to three series: 3100, 5100 and 7100, offering a range of performance tiers and prices. Active-cooling Intel Xeon Phi coprocessors were introduced, allowing workstation users to take advantage of the Intel Many Integrated Core (MIC) architecture. Plans were released for future Intel MIC architecture products, based on the Knights Landing chip, and capable of acting as a stand-alone CPU. In the CPU domain, Intel Xeon processors based on the Haswell architecture were released, supporting a new instruction set AVX2 and new functionality. The work in the users’ domain did not stand still, either. With a large number of case studies and research articles on applications for the Intel MIC architecture, it is accurate to say that the developer ecosystem has been established. We are proud to say that Colfax has made a considerable contribution to this progress with the first edition of “Parallel Programmin and Optimization with Intel Xeon Phi Coprocessors”. In the years 2013 and 2014, over 1000 science and industry experts at tens of locations across North America have been students of the Colfax Developer Training based on this book. Their experience and feedback, along with the innovations in the Intel tools, have built a solid case for the publication of the second edition of “Parallel Programming and Optimization with Intel Xeon Phi Coprocessors”. Among the numerous new features of the second edition, the ones that stand out are:
The details unveiled by Intel of the present and future MIC processors, including Knights Landing.
Discussion of configuration and system administration of clusters with Intel Xeon Phi coprocessors, including InfiniBand support, bridged network configuration and storage setup.
Additional applications based on case studies of our research in 2013–2014 included in the text as references, as well as practical exercises.
Console listings, example codes and hyperlinks to online manuals accurate as of Intel Parallel Studio XE 2015, Intel MPSS 3.4.1 and CentOS 7.0 Linux.
New programming models made available in OpenMP 4.0.
Deeper review of the Intel Math Kernel Library support for the MIC architecture.
More convenient page format and font size for on-screen reading.
Numerous updates to the text improving the clarity and depth of the discussion.